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RISC-V Emulation

Code due Tue Oct 1st by 11:59pm in your Lab03 GitHub repo

Exam problems due Thu Oct 3rd by 11:59pm in your Lab03 GitHub repo

Tests: https://github.com/USF-CS315-F24/tests

Autograder: https://github.com/phpeterson-usf/autograder

Requirements

  1. You will use the given code, lecture material, and RISC-V reference manual to develop a C program which can read RISC-V machine code and emulate what the instructions would do on a real processor.

  2. For reference see the RISC-V ISA Specification Volume 1
    1. Chapter 2 RV32I Base Integer Instruction Set (pages 13-24)
    2. Chapter 5 RV64I Base Integer Instruction Set (pages 35-40)
    3. Chapter 7 “M” Standard Extension for Integer Multiplication and Division (pages 43-44)
    4. Chapter 24 RV32/64G Instruction Set Listings (pages 129-131)
    5. Chapter 25 RISC-V Assembly Programmers Handbook - Pseudo Instructions (pages 137-140)
    6. General RISC-V emulation guide

  3. You do not need to emulate the whole RISC-V processor – just enough to execute the given assembly programs: quadratic_s, midpoint_s, max3_s, and get_bitseq_s.

  4. The given code provides a framework for testing that the emulator output matches the output of the C and assembly language versions of the programs

  5. Your emulator will need logic, including data processing (add, mv, sub, etc.) and branching (j, bCC, jal (call), jalr (ret)) to run the programs

  6. Your emulator will need state, including the general purpose registers and the program counter (pc)

Example Output

$ ./lab04 quadratic 2 4 6 8
C: 36
Asm: 36
Emu: 36

$ ./lab04 midpoint 0 4
C: 2
Asm: 2
Emu: 2

$ ./lab04 max3 3 8 5
C: 8
Asm: 8
Emu: 8

$ ./lab04 get_bitseq 94117 12 15
C: 6
Asm: 6
Emu: 6

Rubric

  1. Your lab will receive the score indicated by the autograder
  2. To get the test cases, git pull in the tests repo
  3. You will not be evaluated on code qaulity for Lab03, but you will be for Project04.

Exam Problems

Question 1 - RISC-V Machine Code

Lets assume that we have a new RISC-V instruction format called the x-type:

 31                 20 19       15 14    12 11       7 6       0
|   imm[5:0|11:6]     |    rs1    | funct3 |    rd    |  opcode |

Assume you have this instruction word in a C uint32_t variable called iw. Write a C code snippet that can construct the a 32 bit signed immediate value from iw, which is a int32_t type called imm. Your code snippet should just use C variables and expressions, no function calls. You cannot use get_bits() or sign_extend().

Question 2 - Cache Memory

Assume you have a 2-way Set Associative Case with 32 total words and a block size of 2 words. How many total sets does this cache have? How many set index bits are there in a 64 bit address?